Nano-Electronics & Computing Research Laboratory at San Francisco State University focuses on designing reliable, energy efficient, high performance computing circuits in emerging nanotechnologies.
School of Engineering
San Francisco State University
1600 Holloway Avenue
San Francisco, CA 94132
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San Francisco State University | School of Engineering
Resources · Curated links
Quick access to tutorials, server guides, and equipment links—curated from reliable public sources.
Featured Links
Quick Learning Paths
Playground
tutorials
Digital, analog, and verification quickstarts
Step-by-step ASIC design flow overview.
Structured approaches to SV verification.
Kick off circuit simulations with proven netlists and setups.
Set up Verilog and compile your first digital design.
server
Connect to lab infrastructure reliably
Step-by-step SSH/X11 setup for server access.
Secure SSH practices on CentOS.
Connect through VMWare with GUI and terminal workflows.
cadence
Virtuoso schematic, layout, and Spectre simulation
synopsys
Member-only university program resources
Full flow with Synopsys tools and 90nm generic library.
Comprehensive verification training from Synopsys UP.
equipment
Probe station booking and lab-ready assets
Check availability then email Dr. Mahmoodi to reserve.
PowerPoint template for NeCRL presentations.
Instructions to reach IEEExplore via university access.
Learning
ENGR 856 — Nano-Scale Circuits & Systems
Advanced nanoscale circuit design.
ENGR 852 — Advanced Digital Design
Modern digital system design.
ENGR 446 — Control Systems Laboratory
Hands-on control systems.
Annual VLSI Design Workshop
Hands-on methodologies.
Research Seminars
Weekly discussions on current work.
Industry Guest Lectures
Talks on emerging technologies.