Resources · Curated links
Resources & Learning Hub
Quick access to tutorials, server guides, and equipment links—curated from reliable public sources.
Featured Links
Quick Learning Paths
Playground
NECRL Mini Terminal
tutorials
Design Tutorials
Digital, analog, and verification quickstarts
ASIC Design Flow
Step-by-step ASIC design flow overview.
SystemVerilog Testbenches
Structured approaches to SV verification.
HSPICE Quick Start
Kick off circuit simulations with proven netlists and setups.
Verilog Basics
Set up Verilog and compile your first digital design.
server
Server Access
Connect to lab infrastructure reliably
Remote Login to Hafez
Step-by-step SSH/X11 setup for server access.
SCI 143 CentOS Login
Secure SSH practices on CentOS.
VMWare Connection
Connect through VMWare with GUI and terminal workflows.
cadence
Cadence Flow
Virtuoso schematic, layout, and Spectre simulation
synopsys
Synopsys UP
Member-only university program resources
ASIC Design Flow
Full flow with Synopsys tools and 90nm generic library.
SystemVerilog Testbench
Comprehensive verification training from Synopsys UP.
equipment
Equipment & Templates
Probe station booking and lab-ready assets
Probe Station Calendar
Check availability then email Dr. Mahmoodi to reserve.
Presentation Template
PowerPoint template for NeCRL presentations.
IEEE Database Access
Instructions to reach IEEExplore via university access.
Learning
Educational Activities
Courses
ENGR 856 — Nano-Scale Circuits & Systems
Advanced nanoscale circuit design.
ENGR 852 — Advanced Digital Design
Modern digital system design.
ENGR 446 — Control Systems Laboratory
Hands-on control systems.
Workshops & Seminars
Annual VLSI Design Workshop
Hands-on methodologies.
Research Seminars
Weekly discussions on current work.
Industry Guest Lectures
Talks on emerging technologies.